Formal Verification of a Power Controller Using the Real-Time Model Checker UPPAAL
DOI:
https://doi.org/10.7146/brics.v6i8.20065Resumé
A real-time system for power-down control in audio/video componentsis modeled and verified using the real-time model checker UPPAAL. The
system is supposed to reside in an audio/video component and control (read from and write to) links to neighbor audio/video components such as TV, VCR and remote–control. In particular, the system is responsible for the powering up and down of the component in between the arrival of data, and in order to do so in a safe way without loss of data, it is essential that no link interrupts are lost. Hence, a component system is a multitasking system with hard real-time requirements, and we present techniques for modeling time consumption in such a multitasked,
prioritized system. The work has been carried out in a collaboration between Aalborg University and the audio/video company B&O. By modeling the system, 3 design errors were identified and corrected, and the following verification confirmed the validity of the design but also revealed the necessity for an upper limit of the interrupt frequency. The resulting design has been implemented and it is going to be incorporated as part of a new product line.
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1999-01-08
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Havelund, K., Larsen, K. G., & Skou, A. (1999). Formal Verification of a Power Controller Using the Real-Time Model Checker UPPAAL. BRICS Report Series, 6(8). https://doi.org/10.7146/brics.v6i8.20065
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