GARLAND, S.; GUTTAG, J.; STAUNSTRUP, J. Verification of VLSI Circuits Using LP. DAIMI Report Series, [S. l.], v. 17, n. 258, 1988. DOI: 10.7146/dpb.v17i258.7842. Disponível em: https://tidsskrift.dk/daimipb/article/view/7842. Acesso em: 9 may. 2024.